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Organization * Company or University

Role * New hire (0-1 year) Early-career engineer (1-3 years) Graduate student (MSc or PhD) Experienced professional (3+ years) Engineering manager Other Select your role

Training areas of interest * RTL, Synthesis and VerificationDigital IC DesignHigh-Speed SerDes DesignDesign VerificationAnalog and Mixed-Signal IC DesignFPGA Design & Implementation

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